Ms. Cook has prosecuted patent applications in technologies such as analog and digital circuit design, digital imaging devices, image processing software, computer-aided design tools, internet telephony, networking devices and semiconductor structure and fabrication. Ms. Cook has represented high technology clients in patent infringement litigations and in providing patent non-infringement and invalidity opinions. Ms. Cook also has experience in pursuing intellectual property protection in foreign countries.

In addition to her legal experience, Ms. Cook has years of technical experience in the semiconductor industry, working as a product engineer for memory devices and subsequently as a failure analysis engineer for complex integrated circuits. Prior to entering law school, she worked as an Engineering Manager at Adaptec where she led a team of four engineers in performing analysis of failed semiconductor integrated circuits. There, Ms. Cook performed detailed circuit analysis for design debug and conducted physical analysis of semiconductor structures for process yield enhancement and reliability improvement.

Ms. Cook is a member of the State Bar of California and is registered to practice before the United States Patent and Trademark Office.

Ms. Cook is fluent in conversational Chinese (Mandarin and Cantonese).

Education:

• University of Rochester, B.S. Electrical Engineering with distinction
• Santa Clara University, M.S. Electrical Engineering
• University of California, Hastings College of the Law, J.D.
  American Jurisprudence Awards in Torts, Wills & Trusts, European Union Law, and International Aspects of Intellectual Property Protection